Field of Invention
This invention relates generally to the testing of integrated circuit chips, and, more particularly to a microelectronic test probe assembly for this purpose.
Many circuits and complex multi-stage electronic systems previously regarded as economically unfeasible and impractical, are now realizable in integrated circuit form. The fabrication of a single-crystal monolithic circuit involves the formation of diodes, transistors, resistors and capacitors on a single microelectronic substrate. In practice, a microelectronic substrate for semiconductor integrated circuits is sealed on a silicon wafer, the circuit patterns being applied to the wafer by photolithography. Each wafer contains the patterns of many identical integrated circuits, the wafer being sliced into "dice", each die or chip containing a single integrated circuit.
In a typical integrated circuit (IC) chip, the input, output, power supply and other terminals of the circuit are formed by metallized contacts, usually deployed along the margins of the circuit pattern. The outline of the chip is either square or rectangular, and the marginal locations of the contacts thereon depend on the circuit configuration and the available marginal space. In some instances, therefore, the contacts may lie in uniform rows along the margins, and in other cases, the contacts may be randomly spaced from each other.
For the purpose of testing any type of integrated-circuit patterns, before the application thereto of leads to connect the contacts to other components, various types of test probe cards have been developed. In one well-known form, the probe card consists of a printed circuit board having an opening or port therein to provide access to an IC pattern. This opening is surrounded by a circle of conductive pads connected by the traces of the printed circuit to terminals on the card which, in turn, are connected to test equipment appropriate to the circuit. The number of pads in the circle determines the maximum capacity of the probe card. If, for example, the card has forty-eight pads, it is capable of testing IC patterns having forty-eight contacts or less.
In setting up a probe card for a particular IC chip pattern, probes constituted by needles of tungsten are affixed to selected pads, the needles extending across the opening. The length and orientation of each needle is such that its point is adapted to engage a respective contact on the IC pattern.
To assemble a probe card for this pattern, one must attach needles to those pads which are most conveniently located with respect to the contacts on the chip. The stretch of each needle depends on the distance between its pad and the particular contact to be engaged. Hence the needles in a conventional probe card vary in length.
Since all of the contacts in the IC pattern lie in a common plane and must be simultaneously engaged in order to carry out testing, it is essential that all needle points lie in a plane parallel to the common IC plane. Consequently, a fundamental requirement of a probe card is planarization of the needle points. The nature of conventional probe cards and the character of the assembly fixtures for setting up the probe positions for such cards are such that it is virtually impossible to assemble probes with needle points lying exactly in the same plane.
With a view to providing an improved microelectronic test probe card, the Garretson et al. U.S. Pat. Nos. 3,835,381 and 3,905,098 disclose a structure in which needle-like probes formed of tungsten wire are supported on the tapered face of a dielectric base ring surrounding a circular opening in the card, the wires being in a generally conical array with respect to the opening. A layer of dielectric material adherent to the tapered surface of the ring acts to secure the wires thereto, the wires being embedded in the layer. The outer ends of the wires are connected to terminals on the card, whereas the inner ends leading to the apex of the cone are bent down to form tips which engage the respective contacts on the IC chip to be tested.
Because the tips of the needles must all lie in a common plane, the angles of the needles in the conical array thereof must be adjusted relative to the tapered surface of the ring to engage the respective contacts on the chip. Thus a steeper angle is required to reach a contact, say, at the corner of the rectangular chip than a contact displaced from a corner. To this end, feeler gauges are used by Garretson et al. to control the positions and locations of each needle on the tapered face of the ring.
After the needles have been carefully adjusted to assume their proper angles, an epoxy or other dielectric material is superimposed over the array of needle probes so as to embed the probes at their assigned angle and position in the epoxy. The assembly so arranged is then heated to cause hardening of the epoxy to thereby retain the array of needles at their selected sites.
In practice, it is a relatively difficult matter to construct a test probe card of the Garretson et al. type, for to create the necessary conical array of needles, one must use a jig having a conical configuration; and because the needles must be positioned at various angles relative to the conical surface of the jig, the needles make point contact with the jig only at the back end thereof and tend to fall out of position. Also, it is difficult to set the needles relative to the jig to allow proper clearance therebetween for epoxy flow.
A further disadvantage is that because the needles are at different angles, the scrub characteristics of the needles are not uniform. Moreover, as needles are added to the jig, it is impossible to control the final angle of each needle, as all needles in the jig have slightly different angles due to the cone effect.
When the needles are brought into engagement with the contact pads on the chip, the tips scrub the pad surfaces to remove oxide film therefrom and thereby improve electrical contact therewith. But if the scrubbing action of the needles is not uniform, then some of the needles will go beyond the pads and invade the surface of the chip and do damage to the circuit.
A proper scrubbing action is important, for without scrubbing to remove non-conductive oxide material from the engaged contact pads on the chip being tested, the needles will make poor electrical contact therewith and an effective test cannot be performed.
Of background interest are the following references: the U.S patents to Ardezzone U.S. Pat. No. 3,891,924; Tarzwell, U.S. Pat. No. 4,161,692; Harmon, U.S. Pat. No. 3,445,770; and Hostetter, U.S. Pat. No. 3,613,001; the Japanese patents to Hasagawa, No. 0135938 and Ookubo, No. 0023437; the West German patent No. 1,910,314 to Epple; and the IBM Technical Disclosure Bulletin, Vol. 18, No. 10, March 1976, Byrnes, H. "Test Contactor".